Job description
For our 8 inch SMIF Wafer Fab in Switzerland (0.35-0.11 µm capability) in our Yield Engineering and Process Integration (YEPI) department we are looking for a Reliability & Parametric Test Engineer.
You will be responsible for extending our Wafer Level Reliability activity and also to follow-up on the results. You will also be responsible for maintaining and improving Parametric Test on our advanced technologies (0.18-0.11 µm). Our main parametric test platform is Agilent (Keysight).
Your tasks will include:
- As a Reliability Engineer:
- Development and execution of WLR strategy for Technologies in Production
- Follow-up of existing Wafer Level Reliability (WLR) tests and development of new WLR tests.
- Work with Technology R&D and the Non-Volatile Memory (NVM) Development Team on setting up relevant WLR tests for NVM.
- Be a central knowledge point for Device Reliability aspects for Technologies in Production
- As a Parametric Test Engineer:
- Owner of test routines and test programs (including WLR), limit files, specifications, operating procedures and work instructions for technologies in Production.
- Participate in parametric test activities for next technology nodes in close cooperation with the development team
- Test pattern design / redesign
- MSA: SPC, Gage R&R analysis
Profile
You are solution oriented, a positive thinker and a team player.
You are interested in working in a production-oriented environment.
Professional requirements
You hold an engineering degree in physics or microelectronics. You have experience in wafer level reliability monitoring. You have experience in computer programming (C and Linux).
Languages
Good communication skills in French and English (spoken and written) are mandatory, German is a plus.